[Extra Speed] High-Speed CMOS Circuits For Optical Receivers
Abstract:The bandwidth requirement of wireline communications has increased exponentially because of the ever-increasing demand for data centers and high-performance computing systems. However, it becomes difficult to satisfy the requirement with legacy electrical links which suffer from frequency-dependent losses due to skin effects, dielectric losses, channel reflections, and crosstalk, resulting in a severe bandwidth limitation. In order to overcome this challenge, it is necessary to introduce optical communication technology, which has been mainly used for long-reach communications, such as long-haul networks and metropolitan area networks, to the medium- and short-reach communication systems. However, there still remain important issues to be resolved to facilitate the adoption of the optical technologies. The most critical challenges are the energy efficiency and the cost competitiveness as compared to the legacy copper-based electrical communications. One possible solution is silicon photonics which has long been investigated by a number of research groups. Despite inherent incompatibility of silicon with the photonic world, silicon photonics is promising and is the only solution that can leverage the mature complementary metal-oxide-semiconductor (CMOS) technologies. Silicon photonics can be utilized in not only wireline communications but also countless sensor applications. This paper introduces a brief review of silicon photonics first and subsequently describes the history, overview, and categorization of the CMOS IC technology for high-speed photo-detection without enumerating the complex circuital expressions and terminologies.Keywords: CMOS; integrated circuit; photodetector; silicon photonics; transimpedance amplifier
[Extra speed] High-Speed CMOS Circuits for Optical Receivers
High-speed optical interconnects of data centers and high performance computers (HPC) have become the rapid development direction in the field of optical communication owing to the explosive growth of market demand. Currently, optical interconnect systems are moving towards higher capacity and integration. High-sensitivity receivers with avalanche photodiodes (APDs) are paid more attention due to the capability to enhance gain bandwidth. The impact ionization coefficient ratio is one crucial parameter for avalanche photodiode optimization, which significantly affects the excess noise and the gain bandwidth product (GBP). The development of silicon-germanium (Si-Ge) APDs are promising thanks to the low impact ionization coefficient ratio of silicon, the simple structure, and the CMOS compatible process. Separate absorption charge multiplication (SACM) structures are typically adopted in Si-Ge APDs to achieve high bandwidth and low noise. This paper reviews design and optimization in high-speed Si-Ge APDs, including advanced APD structures, APD modeling and APD receivers.
Huang et al. demonstrated a waveguide-coupled Si-Ge vertical SACM APD integrated with a CMOS receiver circuit at 25 Gb/s whose prototype is shown in Fig. 13(a) . The BER curves at different gains as well as the simulated and measured sensitivity data in Fig. 13 indicated that the APD receiver indeed improved the receiver sensitivity, thanks to the APD internal gain. The extracted k value was between 0.05 and 0.1. The optimum sensitivity was achieved around multiplication gain of 10. Additionally, Srinivasan et al. demonstrated a waveguide-coupled Si-Ge lateral SACM APD integrated with a BiCMOS receiver circuit at 56 Gb/s . The APD receiver prototype and the BER and sensitivity results are shown in Fig. 14. The extracted k value was around 0.25. The high-speed APD receiver sensitivity analysis in [40, 94, 101, 109] concludes that the optimum sensitivity is realized at a multiplication gain range of 10-20 and the optimum gain depends on noise levels and data rates.
APD receivers with higher sensitivity are essential with the development of optical interconnect technologies towards higher bandwidth, higher integration, lower power consumption and lower cost. Si-Ge APDs with internal gain and low noise can greatly relax the requirements in link budget and power budget to realize higher bandwidth density. Important performance metrics for APD design include breakdown voltage, dark current, quantum efficiency, multiplication gain, bandwidth, excess noise, and GBP. Designing an APD with a low effective impact ionization coefficient ratio k is critical to realize high GBP and low noise. However, some design trade-offs may exist, which requires device optimization for different applications. How to break these trade-offs is one direction for future APD performance improvement. Si-Ge APD schemes can be optimized to trigger the impact ionization effect occurred in silicon more than that in germanium. The thickness of silicon or germanium can be thinned to increase the dead space effect, thereby reducing the k value. The consequent decreased responsivity or multiplication gain can be compensated by other methods, such as adding a reflector. The APD design also needs to consider the complexity and tolerance in device fabrication. Compared to vertical SACM APDs, APDs with lateral SACM or p-i-n structure can benefit from the less fabrication complexity but may require device processes with smaller linewidths. The overall noise sources have to be considered for optimizing APD receiver sensitivity. Design an APD with extremely high gain is not necessary for applications in high-speed optical interconnects since the optimum sensitivity for an APD receiver is achieved with a multiplication gain less than 20 in most cases.
One of the key building blocks of a low-power photonic link is an energy-efficient optical receiver (see "Previous research on low-power optical receivers" on page 44). A low-power optical receiver requires three key elements: a high-speed photodetector with high responsivity and low parasitics (parasitics are effects such as unintended capacitance or resistance in a circuit design); power-efficient very-large-scale-integration (VLSI) receiver circuits; and integration that has low parasitics.
We developed evanescently coupled germanium (Ge) p-i-n waveguide diodes using single-step low-temperature growth of Ge on Si.5 Grating couplers were integrated with the photodiode waveguides for optical input (see Fig. 1). They were fabricated with Luxtera's Ge-enabled optoelectronic process integrated in Freescale's HIP7 Si-on-insulator 130 nm CMOS node. The Ge detector is very compact, with a size of about 1.5 15 μm. Characterization showed that it had a high responsivity of 0.7 A/W at 1550 nm, a low dark current of 3 μA at 25C, and a 0.5 V reverse bias. At 1 V reverse bias, the detector has an extremely low capacitance of less than 20 fF and a -3 dB bandwidth exceeding 10 GHz. The exceptional quality of the Ge-PIN waveguide detector enabled high-speed receiver designs with high sensitivity.
Optical receivers convert a modulated optical signal to an electrical digital signal, using photodetectors as a front end to receive optical signals as photocurrent. Typically a transimpedance amplifier (TIA) converts the photocurrent signal into a voltage, and the voltage signal is then further amplified by multiple limiting amplifiers to a level that can be faithfully identified as either a logical "1" or "0" by the downstream digital circuits. For better energy efficiency, we used a low-power receiver design with a three-stage TIA, followed by a clocked sense amplifier.6 The three-stage TIA gives a total gain of about 1 104, producing a 100 mV output voltage for a 10 μA input signal to achieve sufficient signal-to-noise ratio over the transistor mismatch in the sense amplifier and residual thermal noise from both the detector and the circuits. A simple and power-efficient clocked sense amplifier then subsequently amplifies the TIA output to a full-swing CMOS signal. The input referred noise current was calculated to be 1.1 μA.
We tested the integrated receiver performance with a commercial lightwave transmitter driven by 231-1 PRBS data at 5 Gbit/s. A lensed fiber coupled the modulated optical signal to the detectors through grating couplers. The receiver was embedded in a clocked digital link. A high-speed external clock was fed to the chip, aligned with the input data at the sense amplifier, and used to clock the digital data out through the high-speed buffers after the receiver.
With a received optical signal at 18 μA average photocurrent (equivalent to an optical power of -16 dBm for detector responsivity of 0.7 A/W), we obtained error-free operation for more than 6 hr, indicating a bit-error rate (BER) better than 10-14. We further measured the receiver BER for different average input power levels. The result indicates a receiver sensitivity of about -18.9 dBm for a BER of 10-12 (see Fig. 3). We directly measured a record-low total receiver power consumption of 3.45 mW (or 690 fJ/bit) by measuring the supply voltages and currents during operation. This represents the entire power of the photodetector and its CMOS receiver, as well as any excess power required to drive circuit parasitics including internal wiring and flip-chip pads.7 In summary, we have demonstrated the lowest-energy-per-bit optical receiver to date, using a hybrid high-speed Ge photodetector with high responsivity and low parasitics and power-efficient VLSI receiver circuits.
Efforts to develop low-power optical receivers have been underway since the early 1980s. Early work demonstrated the intimate flip-chip integration of III-V compound semiconductor detectors to CMOS transimpedance amplifiers (TIAs), achieving receiver efficiencies of approximately 3 pJ/bit.2 Using Si CMOS-compatible detectors monolithically integrated with CMOS TIA, receiver energy efficiencies as high as 1.5 pJ/bit at 1 Gbit/s have been demonstrated.3 The use of DC-balanced input data further allowed novel lower-power circuits to be explored. By capacitively coupling a discrete PIN detector to a TIA to significantly reduce parasitic loading and simplify TIA biasing, albeit at a somewhat reduced sensitivity, optical-receiver energy efficiency of 1 pJ/bit was achieved at 10 Gbit/s.4